(a) Field of the Invention
The present invention relates to a liquid crystal display and a method for driving the same and, more particularly, to liquid crystal display achieving a quick response speed based on the overshoot generated through swinging storage electrode voltages in tune with gate pulses.
(b) Description of the Related Art
Pursuant to the requirements by the consumers for thin and lightweight display devices, a liquid crystal display as a flat panel display has been currently used in a most extensive manner in lieu of cathode ray tubes (CRTs). Such a liquid crystal display basically has two glass substrates with electrodes for generating electric fields, and a liquid crystal layer sandwiched between the substrates. When voltages are applied to the electrodes, the liquid crystal molecules are rearranged to control light transmission.
One of the substrates is provided with an array of thin film transistors (TFTs) for switching voltages applied to the electrodes, and the other is provided with a common electrode and color filters. The former is usually called the “TFT array substrate”, and the latter called the “color filter substrate.”
FIG. 1 illustrates a pixel equivalent circuit of a typical TFT LCD. In the TFT LCD, each pixel includes a TFT switching circuit where a source terminal and a gate terminal are connected to a data line and a gate line, a liquid crystal capacitor Cic and a storage capacitor Cst each connected to a drain terminal of the TFT switching circuit, a first parasitic capacitor Cgd formed between the gate terminal and the drain terminal, a second parasitic capacitor Cds formed between the drain terminal and the source terminal, and an overlap capacitor Cover formed between the data line and a pixel electrode.
The way of driving the liquid crystal disposed between the pixel electrodes Vp of the TFT array substrate and the common electrode Vcom of the color filter substrate will be briefly explained.
When the TFT switching circuit receives a positive pulse through the gate line, it becomes to be in a state of turn on. At this time, a signal voltage is applied to the source electrode of the TFT switching circuit through the signal line, and transmitted to the liquid crystal capacitor Cic and the storage capacitor Cst through the drain. The signal voltage is applied to the liquid crystal capacitor Cic even after the gate voltage turns off. However, a pixel voltage shifts its voltage level shift to a certain degree because of the first parasitic capacitance Cgd formed between the gate and the drain.
When it is intended to use the above-structured LCD in a large display, the response speed. In order to enhance the response speed, Matsushita company of Japan proposes to improve the currently used capacitive coupled driving (CCD) technique.
FIG. 2 illustrates the effects of a usual CCD technique. As shown in FIG. 2, the direction of making overshoot and undershoot with respect to the pixel is determined depending upon the property of the liquid crystal. When a pulse is applied to the common electrode COM, the amount of capacitive coupling is turned out to be greater in the direction of the pulse at the liquid crystal with a lower dielectric constant. The pulse of voltage down and voltage up is applied to the common electrode COM in the case of being inverted from plus (+) to minus (−), and the pulse of voltage up and voltage down is applied thereto in the case of being inverted from minus (−) to plus (+). In the normally white mode, when a high gray level becomes to be a low gray level, or a low gray level becomes to be a high gray level, undershoot or overshoot that is lower or higher than the desired normal state of voltage occurs at the liquid crystal so that the liquid crystal molecules are rotated more rapidly.
FIG. 3 illustrates a pixel equivalent circuit of the TFT LCD using previous gates proposed by Matsushita company, and FIG. 4 illustrates the response speed characteristic of the TFT LCD shown in FIG. 3.
In the pixel equivalent circuit, one end of the storage capacitor Cst is connected to the drain, and the other end is connected to a previous gate.
In operation, the average voltage Vp applied to the pixel under the application of is a gate pulse is calculated using the following equation 1:Vp=±Vs+(Cst/(Cst+Cgd+Cic))·ΔVg  (1)
where Vs indicates the voltage applied to the source terminal, Cst indicates the capacitance of the storage capacitor, Cgd is the parasitic capacitance between the gate terminal and the drain terminal, Cic is the capacitance of the liquid crystal capacitor, and ΔVg is the difference between the previous gate voltage and the present gate voltage.
However, the technique of using previous gates increases the gate load. Furthermore, the technique can be employed only for the line inversion driving method and the cross talk or flickermakes it difficult to be used for high resolution wide screen LCDs.
Furthermore, the currently available gate tap IC cannot be used with such a technique. When the gate voltage is over-heightened at the off state, the off current (Ioff) increases, making it difficult to change the gate value.
As described above, the use of previous gate signals as well as the two stepped gate signal application serves to enhance the response speed, but may not be applied to high resolution wide screen LCDs.